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Volumn , Issue , 2006, Pages 97-102

Charge recycling in MTCMOS circuits: Concept and analysis

Author keywords

Charge recycling; Low power design; MTCMOS

Indexed keywords

ELECTRIC CHARGE; ENERGY EFFICIENCY; ENERGY UTILIZATION; RECYCLING;

EID: 34547201177     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1146909.1146940     Document Type: Conference Paper
Times cited : (24)

References (8)
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  • 2
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    • Transistor Sizing Issues and Tool for Multi Threshold CMOS Technology
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  • 3
    • 0031639695 scopus 로고    scopus 로고
    • MTCMOS hierarchical sizing based on mutual exclusive discharge patterns
    • J. Kao, S. Narenda, and A. Chandrakasan, "MTCMOS hierarchical sizing based on mutual exclusive discharge patterns," Proc. DAC, pp. 495-500, 1998.
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    • Kao, J.1    Narenda, S.2    Chandrakasan, A.3
  • 4
    • 0036049095 scopus 로고    scopus 로고
    • Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique
    • M. Anis, S. Areibi, M. Mahmoud, and M. Elmasry, "Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique," Proc. DAC, pp. 480485, 2002.
    • (2002) Proc. DAC , pp. 480485
    • Anis, M.1    Areibi, S.2    Mahmoud, M.3    Elmasry, M.4
  • 5
    • 16244390217 scopus 로고    scopus 로고
    • Experimental measurement of a novel power gating structure with intermediate power saving mode
    • S. Kim, S.V. Kosonocky, D. R. Knebel, and K. Stawiasz, "Experimental measurement of a novel power gating structure with intermediate power saving mode," Proc. ISLPED, pp. 20-25, 2004.
    • (2004) Proc. ISLPED , pp. 20-25
    • Kim, S.1    Kosonocky, S.V.2    Knebel, D.R.3    Stawiasz, K.4
  • 6
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    • An effective power mode transition technique in MTCMOS
    • A. Abdollahi, F. Fallah, and M. Pedram, "An effective power mode transition technique in MTCMOS," Proc. DAC, pp. 37-42, 2005.
    • (2005) Proc. DAC , pp. 37-42
    • Abdollahi, A.1    Fallah, F.2    Pedram, M.3
  • 7
    • 85087536713 scopus 로고    scopus 로고
    • Understanding and minimizing ground bounce during mode transition of power gating structures
    • S. Kim, S.V. Kosonocky, Stephen, and D.R. Knebel, "Understanding and minimizing ground bounce during mode transition of power gating structures", Proc. ISLPED, pp. 22-25, 2003.
    • (2003) Proc. ISLPED , pp. 22-25
    • Kim, S.1    Kosonocky, S.V.2    Stephen3    Knebel, D.R.4
  • 8
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    • Ground bounce in digital VLSI circuits
    • Apr
    • P. Heydari, and M. Pedram, "Ground bounce in digital VLSI circuits," IEEE Trans. on VLSI systems, pp. 180-193, Apr. 2003.
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    • Heydari, P.1    Pedram, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.