CMOS circuit design of threshold gates with hysteresis

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1998, Pages 61-64

  Sobelman, Gerald E ^a   Fant, Karl ^a  

^a Theseus Logic   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HYSTERESIS; LOGIC DESIGN; LOGIC GATES;

ASYNCHRONOUS LOGIC DESIGN;

CMOS INTEGRATED CIRCUITS;

EID: 0031623033     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)