Adder designs and analyses for quantum-dot cellular automata

IEEE Transactions on Nanotechnology

Volumn 6, Issue 3, 2007, Pages 374-383

  Cho, Heumpil ^a,b,c   Swartzlander Jr , Earl E ^a,b  

^a IEEE   (United States)

^b The University of Texas at Austin   (United States)

^c QUALCOMM INC   (United States)

Author keywords

Adder; Carry lookahead adder; Conditional sum adder; Layout; Logic design; Quantum dot cellular automata (QCA); Ripple carry adder; Simulation

Indexed keywords

CARRY LOOKAHEAD ADDER; CONDITIONAL SUM ADDER; QUANTUM-DOT CELLULAR AUTOMATA (QCA); RIPPLE CARRY ADDER;

CELLULAR AUTOMATA; COMPUTER SIMULATION; ELECTRIC POWER UTILIZATION; GATES (TRANSISTOR); LOGIC DESIGN; NANOTECHNOLOGY;

ADDERS;

EID: 34248647305     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2007.894839     Document Type: Article

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