High-speed recursion architectures for MAP-based turbo decoders

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 4, 2007, Pages 470-474

  Wang, Zhongfeng ^a  

^a Oregon State University   (United States)

Author keywords

Error correction codes; High speed design; Maximum a posterior probability (MAP) decoder; Turbo code; VLSI

Indexed keywords

DECODING; ERROR CORRECTION; LOGIC DESIGN; RECURSIVE FUNCTIONS; TURBO CODES; VLSI CIRCUITS;

ALGORITHMIC TRANSFORMATION; ERROR CORRECTION CODES; HIGH SPEED DESIGN; MAXIMUM A POSTERIOR PROBABILITY (MAP) DECODERS;

SOFTWARE ARCHITECTURE;

EID: 34247578243     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.893668     Document Type: Article

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