Automatic design of area-efficient configurable ASIC cores

IEEE Transactions on Computers

Volumn 56, Issue 5, 2007, Pages 662-672

  Compton, Katherine ^a   Hauck, Scott ^b  

^a University of Wisconsin Madison   (United States)

^b University of Washington   (United States)

Author keywords

Logic design and synthesis; Reconfigurable architecture

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; LOGIC DESIGN; OPTIMIZATION;

AUTOMATIC DESIGN; RECONFIGURABLE ARCHITECTURE; RECONFIGURABLE HARDWARE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 34147186108     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2007.1035     Document Type: Article

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