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Volumn 40, Issue 3, 2007, Pages 28-37

Trident: From high-level language to hardware circuitry

Author keywords

FPGAs; Handel C; Impulse C; Mitrion C; RC Toolbox; Reconfigurable computing; SRC Carte; Supercomputing; Trident compiler

Indexed keywords


EID: 34147115136     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/MC.2007.107     Document Type: Article
Times cited : (48)

References (12)
  • 2
    • 84904785426 scopus 로고    scopus 로고
    • Area and Power Performance Analysis of Floating-Point-Based Application on FPGAs
    • Sept
    • G. Govindu et al., "Area and Power Performance Analysis of Floating-Point-Based Application on FPGAs," Proc. 7th Ann. Workshop High-Performance Embedded Computing (HPEC 03), Sept. 2003; www.11.mit.edu/HPEC/agenda03.htm.
    • (2003) Proc. 7th Ann. Workshop High-Performance Embedded Computing (HPEC 03)
    • Govindu, G.1
  • 9
    • 3042658703 scopus 로고    scopus 로고
    • LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation
    • IEEE CS Press
    • C. Lattner and V. Adve, "LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation," Proc. Int'l Symp. Code Generation and Optimization (CGO 04), IEEE CS Press, 2004, pp. 75-86.
    • (2004) Proc. Int'l Symp. Code Generation and Optimization (CGO 04) , pp. 75-86
    • Lattner, C.1    Adve, V.2
  • 12
    • 0028768013 scopus 로고
    • Iterative Modulo Scheduling: An Algorithm for Software Pipelining Loops
    • ACM Press
    • B.R. Rau, "Iterative Modulo Scheduling: An Algorithm for Software Pipelining Loops," Proc. 27th Ann. Int'l Symp. Microarchitecture, ACM Press, 1994, pp. 63-74.
    • (1994) Proc. 27th Ann. Int'l Symp. Microarchitecture , pp. 63-74
    • Rau, B.R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.