Automatic allocation of arrays to memories in FPGA processors with multiple memory banks

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1999, Pages 63-69

  Gokhale, Maya B ^a   Stone, Janice M ^a  

^a SARNOFF CORPORATION   (United States)

Author keywords

Configurable computing; FPGA; FPGA design tools; Hardware software co design; High level synthesis; Silicon compiler

Indexed keywords

ALGORITHMS; ARRAYS; C (PROGRAMMING LANGUAGE); DIGITAL SIGNAL PROCESSING; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; PROGRAM COMPILERS; RESPONSE TIME (COMPUTER SYSTEMS); STATIC RANDOM ACCESS STORAGE;

EXECUTION TIME; MULTIPLE MEMORY BANKS;

STORAGE ALLOCATION (COMPUTER);

EID: 0033488503     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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