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Volumn 3203, Issue , 2004, Pages 95-104

Monte Carlo radiative heat transfer simulation on a reconfigurable computer

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; COMPUTATION THEORY; DIGITAL ARITHMETIC; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HEAT TRANSFER; MONTE CARLO METHODS; SUPERCOMPUTERS;

EID: 35048823801     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30117-2_12     Document Type: Article
Times cited : (23)

References (15)
  • 2
    • 35048813847 scopus 로고    scopus 로고
    • Area and Power Performance Analysis of Floating-point based Application on FPGAs
    • (Lexington, MA), September
    • Seventh Annual Workshop on High Performance Embedded Computing (HPEC 2003), Area and Power Performance Analysis of Floating-point based Application on FPGAs, (Lexington, MA), September 2003.
    • (2003) Seventh Annual Workshop on High Performance Embedded Computing (HPEC 2003)
  • 5
    • 0024879226 scopus 로고
    • Vector and parallel monte carlo radiative heat transfer simulation
    • P. J. Burns and D. V. Pryor, "Vector and parallel monte carlo radiative heat transfer simulation," Numerical Heat Transfer, vol. 16, 1989.
    • (1989) Numerical Heat Transfer , vol.16
    • Burns, P.J.1    Pryor, D.V.2
  • 6
    • 0029507865 scopus 로고
    • Quantitative analysis of floating point arithmetic of FPGA based custom computing machines
    • (Napa, CA), IEEE Computer Society Press
    • N. Shirazi, A. Walters, and P. Athanas, "Quantitative analysis of floating point arithmetic of FPGA based custom computing machines," in IEEE Symposium on Field-Programmable Custom Computing Machines, (Napa, CA), pp. 155-162, IEEE Computer Society Press, 1995.
    • (1995) IEEE Symposium on Field-Programmable Custom Computing Machines , pp. 155-162
    • Shirazi, N.1    Walters, A.2    Athanas, P.3
  • 9
    • 16244376375 scopus 로고    scopus 로고
    • Feasibility of floating-point arithmetic in FPGA based artificial neural networks
    • Nov.
    • K. R. Nichols, M. A. Moussa, and S. M. Areibi, "Feasibility of floating-point arithmetic in FPGA based artificial neural networks," CAINE02, Nov. 2002.
    • (2002) CAINE02
    • Nichols, K.R.1    Moussa, M.A.2    Areibi, S.M.3
  • 11
    • 0003747969 scopus 로고    scopus 로고
    • QinetiQ Holdings Ltd., "Real time systems lab." http://www.quixilica.com/ products.htm, 2002.
    • (2002) Real Time Systems Lab
  • 12
    • 84862480152 scopus 로고    scopus 로고
    • Nallatech, "Floating point IP cores for virtex-II." http: //www.nallatech.com/ solutions/products/ software_fpga_ip/fpga_ip/fpc/, 2003.
    • (2003) Floating Point IP Cores for Virtex-II


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.