Single-station performance evaluation and improvement in semiconductor manufacturing: A graphical approach

International Journal of Production Economics

Volumn 107, Issue 2, 2007, Pages 397-403

  Li, Na ^a   Zhang, Mike Tao ^b   Deng, Shiming ^c   Lee, Zu Hsu ^d   Zhang, Lawrence ^e   Zheng, Li ^a  

^a TSINGHUA UNIVERSITY   (China)

^b INTEL CORPORATION   (United States)

^c ORACLE CORPORATION   (United States)

^d MONTCLAIR STATE UNIVERSITY   (United States)

^e INTEL CORPORATION   (China)

Author keywords

China; Cycle time; Manufacturing systems; Queue; Semiconductor manufacturing

Indexed keywords

CHINA; GRAPHIC METHODS; MANAGERS; OPTIMIZATION; THROUGHPUT;

CYCLE TIME; QUEUE; WORK-IN-PROCESS (WIP);

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 34047181192     PISSN: 09255273     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.ijpe.2006.08.011     Document Type: Article

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