A methodology for drop performance modeling and application for design optimization of chip-scale packages

IEEE Transactions on Electronics Packaging Manufacturing

Volumn 30, Issue 1, 2007, Pages 42-48

  Syed, Ahmer ^a   Kim, Seung Mo ^b   Lin, Wei ^a   Kim, Jin Young ^b   Sohn, Eun Sook ^b   Shin, Jae Hyeon ^b  

^a AMKOR TECHNOLOGY   (United States)

^b Amkor Technology Korea Inc   (South Korea)

Author keywords

Chip scale package (CSP); Design optimization; Drop impact; Finite element simulation; Reliability; Solder joint

Indexed keywords

BALL GRID ARRAYS; DYNAMIC RESPONSE; FAILURE ANALYSIS; FINITE ELEMENT METHOD; MATHEMATICAL MODELS; OPTIMIZATION; PRINTED CIRCUIT BOARDS; PRINTED CIRCUIT DESIGN;

BOARD-LEVEL DROP TEST; DROP PERFORMANCE; LAND GRID ARRAY;

CHIP SCALE PACKAGES;

EID: 34047155013     PISSN: 1521334X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEPM.2006.890644     Document Type: Article

References (13)

1. Board Level Drop Test Method of Components for Handheld Electronic Products, JEDEC Std. JESD22-B111.
2. E. H. Wong, Y.-W. Mai, and S. K. W. Seah, "Board level drop impact - Fundamental and parametric analysis," ASME Trans. J. Electron. Packag., vol. 127, no. 4, pp. 496-502, 2005.
3. S. K. W. Seah, E. H. Wong, R. Ranjan, C. T. Lim, and Y. W. Mai, "Understanding and testing for drop impact failure," in Proc. InterPACK'05, 2005, pp. 1-6, IPACK2005-73047.
4. C. T. Lim and Y. J. Low, "Drop impact testing of portable electronic products," in Proc. 52nd Electron. Compon. Technol. Conf., 2002, pp. 1270-1274.
5. J. H. L. Pang and F. X. Che, "Drop impact analysis of Sn-Ag-Cu solder joints using dynamic high-strain rate plastic strain as the impact damage driving force," in Proc. 56th Electron. Compon. Technol. Conf., 2006, pp. 49-54.
6. T. Y. Tee, J. E. Luan, E. Pek, C. T. Lim, and Z. W. Zhong, "Advanced experimental and simulation techniques for analysis of dynamic responses during drop impact," in Proc. Electron. Compon. Technol. Conf., 2004, pp. 1089-1094.
7. P. Lall, S. Gupte, P. Choudhary, and J. Suhling, "Solder-joint reliability in electronics under shock and vibration using explicit finite-element sub-modeling," in Proc. 56th Electron. Compon. Technol. Conf., 2006, pp. 428-435.
8. L. Zhu, "Modeling technique for reliability assessment of portable electronic product subjected to drop impact loads, in Proc. 53rd Electron. Compon. Technol. Conf., 2003, pp. 100-104.
9. E. H. Wong, K. M. Lim, N. Lee, S. Seah, C. Hoe, and J. Wang, "Drop impact test - Mechanics and physics of failure," in Proc. 4th Electron. Packag. Technol. Conf., Singapore, 2002, pp. 327-333.
10. R. J. Fields and S. R. Low, "Physical and mechanical properties of intermetallic compounds found in solder joints," National Inst. Standards and Technol., Gaithersburg, MD, NIST Rep.
11. S. Wiese, E. Meusel, and K.-J. Wolter, "Microstructural dependence of constitutive properties of eutectic SnAg and SnAgCu solders," in Proc. 53rd Electron. Compon. Technol. Conf., 2003, pp. 197-206.
12. A. Kujala, T. Reinikainen, and W. Ren, Transition to Pb-free manufacturing using land grid array packaging technology,in Proc. Electron. Compon. Technol. Conf., 2002, pp. 359-364.
13. A. Syed and R. Darveaux, "LGA versus BGA: What is more reliable? A second level reliability comparison," in Proc. SMTA Int., Chicago, IL, Sep. 2000, pp. 347-352.