Novel full-chip gridless routing considering double-via insertion

Proceedings - Design Automation Conference

Volumn , Issue , 2006, Pages 755-760

  Chen, Huang Yu ^a   Chiang, Mei Fang ^a   Chang, Yao Wen ^a   Chen, Lumdo ^b   Han, Brian ^b  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^b UNITED MICROELECTRONICS CORPORATION   (Taiwan)

Author keywords

Manufacturability; Redundant via insertion; Routing

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; ROUTING ALGORITHMS; TECHNOLOGY TRANSFER;

DESIGN COMPLEXITY; GRIDLESS ROUTING SYSTEMS; MANUFACTURABILITY; REDUNDANT VIA INSERTION;

MICROPROCESSOR CHIPS;

EID: 33947604851     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1146909.1147101     Document Type: Conference Paper

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