Highly reliable CVD-WSi metal gate electrode for nMOSFETs

IEEE Transactions on Electron Devices

Volumn 52, Issue 10, 2005, Pages 2215-2218

  Nakajima, Kazuaki ^b   Nakazawa, Hiroshi ^b   Sekine, Katsuyuki ^b   Matsuo, Kouji ^a,b   Saito, Tomohiro ^b   Katata, Tomio ^b   Suguro, Kyoichi ^b   Tsunashima, Yoshitaka ^b  

^a IEEE

^b TOSHIBA CORPORATION   (Japan)

Author keywords

Damascene; Metal gate; nMOSFET; WSi

Indexed keywords

CARRIER MOBILITY; CHEMICAL VAPOR DEPOSITION; ELECTRON MOBILITY; HOLE MOBILITY; MOSFET DEVICES; SILICON WAFERS;

DAMASCENE; METAL GATE; NMOSFET;

ELECTRODES;

EID: 33947387603     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.856187     Document Type: Article

References (9)

1. K. Nakajima, Y. Akasaka, M. Kaneko, M. Tamaoki, Y. Yamada, T. Shimizu, Y. Ozawa, and K. Suguro, "Work function controlled metal gate electrode on ultrathin gate insulators," in Symp. VLSI Tech. Dig., 1999, p. 95.
2. T. Saito, K. Sekine, K. Matsuo, K. Nakajima, K. Suguro, and Y. Tsunashima, "Low-standby-power complementary metal-oxide-semiconductor transistors with TiN single gate on 1.8 nm gate oxide," Jpn. J. Appl. Phys., vol. 42, pp. L1130-L1132, 2003.
3. K. Matsuo, O. Arisumi, and K. Suguro, New dual metal gate by using WSix for nMOS and Pt-alloyed WSix for pMOS, in Ext. Abst. SSDM, pp. 732-733, 2003.
4. 2 gate dielectric," in IEDM Tech. Dig., 2002, pp. 433-436.
5. J. H. Lee, H. Zhong, Y.-S. Suh, G. Heuss, J. Gurganus, B. Chen, and V. Misra, "Tunable work function dual metal gate technology for bulk and nonbulk CMOS," in IEDM Tech. Dig., 2002, pp. 359-362.
6. J. Kedzierski, D. Boyd, P. Ronsheim, S. Zafar, J. Newbury, J. Ott, C. Cabrai Jr., M. Ieong, and W. Haensch, "Threshold voltage control in NiSi-gated MOSFETs through silicidation induced impurity segregation (SUS)," in IEDM Tech. Dig., 2003, pp. 315-318.
7. G. Ghidini, C. Clementi, D. Drera, and F. Maugain, "The impact of F contamination induced by the process on the gate oxide reliability," Microelectron. Reliab., vol. 38, pp. 255-258, 1998.
8. S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of inversion layer mobility in Si MOSFETs: Part I - Effects of substrate impurity concentration," IEEE Trans. Electron Devices, vol. 41, no. 12, pp. 2357-2362, Dec. 1994.
9. M. S. Krishnan, Y. C. Yeo, Q. Lu, T.-J. King, J. Bokor, and C. Hu, "Remote charge scattering in MOSFETs with ultrathin gate dielectrics," in IEDM Tech. Digest, 1998, pp. 571-574.