A new logic family based on hybrid MOSFET-polysilicon nanowires

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 269-272

  Ecoffey, S ^a   Mazza, M ^a   Pott, V ^a   Bouvet, D ^a   Schmid, A ^a   Leblebici, Y ^a   Declercq, M J ^a   Ionescu, A M ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ENERGY DISSIPATION; ENERGY UTILIZATION; NANOWIRES; POLYSILICON; ULTRATHIN FILMS;

NANOGRAINS; POLYSILICON WIRES;

MOSFET DEVICES;

EID: 33847755085     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iedm.2005.1609325     Document Type: Conference Paper

References (6)

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