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Volumn 2005, Issue , 2005, Pages 417-420

Improvement in high-k (HfO2/SiO2) reliability by incorporation of fluorine

Author keywords

[No Author keywords available]

Indexed keywords

FLUORINE; HOLE TRAPS; HYSTERESIS; INTERFACES (MATERIALS);

EID: 33847745031     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (29)

References (9)
  • 3
    • 20444463961 scopus 로고    scopus 로고
    • 2-based high-k gate dielectrics
    • 2-based high-k gate dielectrics", IEDM Tech. Dig., p 129 (2004)
    • (2004) IEDM Tech. Dig , pp. 129
    • Torii, K.1
  • 4
    • 0041340533 scopus 로고    scopus 로고
    • Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing
    • D. K. Schroder and J. A. Babcock, "Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing", J. Appl. Phys., vol. 94, p 1 (2003)
    • (2003) J. Appl. Phys , vol.94 , pp. 1
    • Schroder, D.K.1    Babcock, J.A.2
  • 5
    • 0024663207 scopus 로고
    • The effect of fluorine in silicon dioxide gate dielectrics
    • P. J. Wright and K. C. Saraswat, "The effect of fluorine in silicon dioxide gate dielectrics", IEEE Trans. Electron Devices, vol. 2, p 879 (1989)
    • (1989) IEEE Trans. Electron Devices , vol.2 , pp. 879
    • Wright, P.J.1    Saraswat, K.C.2
  • 6
    • 0035397517 scopus 로고    scopus 로고
    • The effects of fluorine on parametrics and reliability in a 0.18-μm 3.5/6.8 nm dual gate oxide CMOS technology
    • T. B. Hook et al., "The effects of fluorine on parametrics and reliability in a 0.18-μm 3.5/6.8 nm dual gate oxide CMOS technology", IEEE Trans. Electron Devices, vol. 48, p 1346 (2001)
    • (2001) IEEE Trans. Electron Devices , vol.48 , pp. 1346
    • Hook, T.B.1
  • 7
    • 0037634587 scopus 로고    scopus 로고
    • Evaluation of the positive biased temperature stress instability in HfSiON gate dielectrics
    • A. Shanware et al., "Evaluation of the positive biased temperature stress instability in HfSiON gate dielectrics", IEEE Annual International Reliability Physics Symposium, p 208 (2003)
    • (2003) IEEE Annual International Reliability Physics Symposium , pp. 208
    • Shanware, A.1
  • 9
    • 0017493207 scopus 로고
    • Negative bias stress of MOS devices at high electric field and degradation of MNOS devices
    • K. O. Jeppson and C. M. Svensson, "Negative bias stress of MOS devices at high electric field and degradation of MNOS devices", J. Appl. Phys., vol. 48, p 2004 (1977)
    • (1977) J. Appl. Phys , vol.48 , pp. 2004
    • Jeppson, K.O.1    Svensson, C.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.