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Volumn 2005, Issue , 2005, Pages 882-890

Parallel, multi-DUT testing in an open architecture test system

Author keywords

[No Author keywords available]

Indexed keywords

COST EFFECTIVENESS; OPEN SYSTEMS; PARALLEL PROCESSING SYSTEMS;

EID: 33847159608     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2005.1584053     Document Type: Conference Paper
Times cited : (6)

References (8)
  • 1
    • 84954419622 scopus 로고    scopus 로고
    • Lowering Cost of Test: Parallel Test or Low-Cost ATE?
    • November
    • th. Asian Test Symposium, November 2003, pp. 361-368.
    • (2003) th. Asian Test Symposium , pp. 361-368
    • Rivoir, J.1
  • 2
    • 33847112697 scopus 로고    scopus 로고
    • Comparison of Final Test Handling Strategies for Massively Parallel Test of Logic Devices
    • February
    • P. Cochran, G. Kovar, T. Pham, "Comparison of Final Test Handling Strategies for Massively Parallel Test of Logic Devices", Future Fab International, Vol. 12, February 2002.
    • (2002) Future Fab International , vol.12
    • Cochran, P.1    Kovar, G.2    Pham, T.3
  • 3
    • 0036446044 scopus 로고    scopus 로고
    • Scan-Based Testing: The Only Practical Solution for Testing ASIC/Consumer Products
    • October
    • P. Nigh, "Scan-Based Testing: The Only Practical Solution for Testing ASIC/Consumer Products", Proc. 2002 IEEE International Test Conference, October 2002, pg. 1198.
    • (2002) Proc. 2002 IEEE International Test Conference , pp. 1198
    • Nigh, P.1
  • 6
    • 18144413607 scopus 로고    scopus 로고
    • Test Programming Environment in a Modular, Open Architecture Test System
    • October
    • A. Pramanick et al., "Test Programming Environment in a Modular, Open Architecture Test System", Proc. 2004 IEEE International Test Conference, October 2004, pp. 413-422.
    • (2004) Proc. 2004 IEEE International Test Conference , pp. 413-422
    • Pramanick, A.1
  • 7


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.