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Volumn 2005, Issue , 2005, Pages 882-890
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Parallel, multi-DUT testing in an open architecture test system
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Author keywords
[No Author keywords available]
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Indexed keywords
COST EFFECTIVENESS;
OPEN SYSTEMS;
PARALLEL PROCESSING SYSTEMS;
MULTIPLE DEVICES;
OPEN ARCHITECTURE TEST SYSTEMS;
PARALLEL TEST STRATEGY;
ELECTRONIC EQUIPMENT TESTING;
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EID: 33847159608
PISSN: 10893539
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/TEST.2005.1584053 Document Type: Conference Paper |
Times cited : (6)
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References (8)
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