A Monte Carlo investigation of nanocrystal memory reliability

7th International Conference on Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, EuroSimE 2006

Volumn 2006, Issue , 2006, Pages

  Gusmeroli, R ^a   Spinelli, A S ^a   Monzio Compagnoni, C ^a   Ielmini, D ^a   Lacaita, A L ^a,b  

^a POLITECNICO DI MILANO   (Italy)

^b IFN CNR   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CONSTRAINT THEORY; DATA STORAGE EQUIPMENT; FLASH MEMORY; NANOSTRUCTURED MATERIALS; PROBABILITY;

CONVENTIONAL FLASH CELL; FLOATING-GATE EFFECTS; NANOCRYSTAL MEMORIES;

MONTE CARLO METHODS;

EID: 33847127534     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESIME.2006.1643985     Document Type: Conference Paper

References (10)

1. S. Tiwari, F. Rana, K. Chan, H. Hanafi, W. Chan, and D. Buchanan, "Volatile and non-volatile memories in silicon with nano-crystal storage," in IEDM Tech. Dig., pp. 521-524, 1995.
2. R. Muralidhar, R. F. Steimle, M. Sadd, R. Rao, C. T. Swift, E. J. Prinz, J. Yater, L. Grieve, K. Harber, B. Hradsky, S. Straub, B. Acred, W. Paulson, W. Chen, L. Parker, S. G. H. Anderson, M. Rossow, T. Merchant, M. Paransky, T. Huynh, D. Hadad, K.-M. Chang, and B. E. White Jr, "A 6V embedded 90nm silicon nanocrystal nonvolatile memory," in IEDM Tech. Dig., pp. 601-604, 2003.
3. B. De Salvo, C. Gerardi, S. Lombardo, T. Baron, L. Perniola, D. Mariolle, P. Mur, A. Toffoli, M. Gely, M. N. Semeria, S. Deleonibus, G. Ammendola, V. Ancarani, M. Melanotte, R. Bez, L. Baldi, D. Corso, I. Crupi, R. A. Puglisi, G. Nicotra, E. Rimini, F. Mazen, G. Ghibaudo, G. Pananakakis, C. Monzio Compagnoni, D. Ielmini, A. Lacaita, A. Spinelli, Y. M. Wan, and K. van der Jeugd, "How far will silicon nanocrystals push the scaling limits of NVMs technologies?," in IEDM Tech. Dig., pp. 597-600, 2003.
4. T. Ishii, T. Osabe, T. Mine, F. Murai, and K. Yano, "Engineering variations: towards practical single-electron (few-electron) memory," in IEDM Tech. Dig., pp. 305-308, 2000.
5. J. De Blauwe, "Nanocrystal nonvolatile memory devices," IEEE Trans. Nanotechnology, vol. 1, pp. 72-77, 2002.
6. C. Monzio Compagnoni, D. Ielmini, A. S. Spinelli, A. L. Lacaita, C. Previtali, and C. Gerardi, "Study of data retention for nanocrystal Flash memories," in Proc. IRPS, pp. 506-512, 2003.
7. D. Ielmini, A. S. Spinelli, A. L. Lacaita, and A. Modelli, "Statistical modeling of reliability and scaling projections for Flash memories," in IEDM Tech. Dig., pp. 703-706, 2001.
8. D. Ielmini, A. S. Spinelli, and A. L. Lacaita, "Recent developments on Flash memory reliability," Microelectron. Eng., vol. 80C, pp. 321-328, 2005.
9. R. Bez, "Innovative technologies for high density non-volatile semiconductor memories," Microelectron. Eng., vol. 80, pp. 249-255, 2005.
10. T window in nanocrystal memories," Microelectron. Eng., vol. 80, pp. 186-189, 2005.