Efficient SAT-based combinational ATPG using multi-level don't-cares

Proceedings - International Test Conference

Volumn 2005, Issue , 2005, Pages 1029-1038

  Saluja, Nikhil S ^a   Khatri, Sunil P ^b  

^a UNIVERSITY OF COLORADO   (United States)

^b TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN SATISFIABILITY (SAT); COMBINATIONAL DESIGNS; LOGIC OPTIMIZATION; TRANSITIVE FANOUT (TFO);

ERROR DETECTION; INTEGRATED CIRCUIT TESTING; LOGIC DESIGN; OBSERVABILITY;

COMBINATORIAL CIRCUITS;

EID: 33847109280     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2005.1584069     Document Type: Conference Paper

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