Testing high-speed, large scale implementation of SerDes I/Os on chips used in throughput computing systems

Proceedings - International Test Conference

Volumn 2005, Issue , 2005, Pages 992-999

  Robertson, Iain ^a   Hetherington, Graham ^a   Leslie, Tom ^a   Parulkar, Ishwar ^b   Lesnikoski, Ronald ^b  

^a TEXAS INSTRUMENTS   (United States)

^b SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP INTERFACES; COMPUTING CHIP SETS; COMPUTING SYSTEMS; LARGE SCALE IMPLEMENTATION;

BANDWIDTH; DESIGN FOR TESTABILITY; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS;

INTEGRATED CIRCUIT TESTING;

EID: 33847101727     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2005.1584065     Document Type: Conference Paper

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