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Volumn 2005, Issue , 2005, Pages 111-119
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Testability features of the first-generation cell processor
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Author keywords
[No Author keywords available]
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Indexed keywords
ASYNCHRONOUS MACHINERY;
LOGIC DESIGN;
SYNCHRONOUS MACHINERY;
ASYNCHRONOUS CLOCK DOMAINS;
CELL PROCESSOR;
CELL TEST LOGIC;
MICROPROCESSOR CHIPS;
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EID: 33847093317
PISSN: 10893539
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/TEST.2005.1583967 Document Type: Conference Paper |
Times cited : (26)
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References (11)
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