An FPGA-based floating-point jacobi iterative solver

Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN

Volumn 2005, Issue , 2005, Pages 420-427

  Morris, Gerald R ^a   Prasanna, Viktor K ^a  

^a EEB 200C ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLOATING-POINT VERSION; ITERATIVE SOLVER; JACOBI ITERATIVE METHOD;

COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); ITERATIVE METHODS; PARAMETER ESTIMATION; PRODUCT DESIGN;

PARALLEL PROCESSING SYSTEMS;

EID: 33846985251     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPAN.2005.18     Document Type: Conference Paper

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