메뉴 건너뛰기




Volumn , Issue , 2001, Pages 63-66

Programmable logic IP cores in SoC design: Opportunities and challenges

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; INTELLECTUAL PROPERTY; NETWORK PROTOCOLS; STATIC RANDOM ACCESS STORAGE; TABLE LOOKUP;

EID: 0034835768     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (49)

References (9)
  • 4
    • 0003543156 scopus 로고    scopus 로고
    • QuickLogic steps up merger of FPGA with IP cores - DSP first target
    • August 9
    • (2000) E.E. Times
    • Merritt, R.1
  • 5
    • 0003515904 scopus 로고    scopus 로고
    • Embedded FPGA cores enable programmable ASICs, ASSPs
    • September 20
    • (1999) E.E. Times
  • 9
    • 0030389237 scopus 로고    scopus 로고
    • Directional bias and non-uniformity in FPGA global routing architectures
    • (1996) ICCAD , pp. 652-659
    • Betz, V.1    Rose, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.