Frequency-thermal characterization of on-chip transformers with patterned ground shields

IEEE Transactions on Microwave Theory and Techniques

Volumn 55, Issue 1, 2007, Pages 1-11

  Shi, Jinglin ^b   Yin, Wen Yan ^a,c   Kang, Kai ^b   Mao, Jun Fa ^a,c   Li, Le Wei ^a,d  

^a IEEE   (China)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

^c SHANGHAI JIAO TONG UNIVERSITY   (China)

^d NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

Interleaved and center tapped transformers; Maximum available gain; Minimum noise figure; Pattern ground shields (PGSs); Power loss; Quality (Q) factor; Temperature

Indexed keywords

INTERLEAVED AND CENTER-TAPPED TRANSFORMERS; MAXIMUM AVAILABLE GAIN; MINIMUM NOISE FIGURE; PATTERN GROUND SHIELDS (PGSS); POWER LOSS;

COMPUTATIONAL GEOMETRY; MICROWAVES; PARAMETER ESTIMATION; Q FACTOR MEASUREMENT; SPURIOUS SIGNAL NOISE; THERMAL EFFECTS;

CMOS INTEGRATED CIRCUITS;

EID: 33846608258     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/TMTT.2006.888934     Document Type: Article

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