A Broadband low spur fully integrated BiCMOS PLL for 60 GHz wireless applications

Proceedings - 2006 IEEE Radio and Wireless Symposium

Volumn 2006, Issue , 2006, Pages 451-454

  Glišić, Srdan ^a   Winkler, Wolfgang ^a  

^a IHP   (Germany)

Author keywords

Broadband phase locked loop (PLL); Frequency synthesizer; Spurs; Wireless LAN

Indexed keywords

ATTENUATION; BANDWIDTH; BROADBAND NETWORKS; CMOS INTEGRATED CIRCUITS; FREQUENCY SYNTHESIZERS; LOCAL AREA NETWORKS; OSCILLATORS (ELECTRONIC); VOLTAGE CONTROL; WIRELESS TELECOMMUNICATION SYSTEMS;

BROADBAND PHASE-LOCKED LOOP; PHASE NOISE; SPURIOUS SIDEBANDS; WIRELESS LAN;

PHASE LOCKED LOOPS;

EID: 33846387456     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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