Novel collector design for high-speed SiGe: C HBTs

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2002, Pages 775-778

  Heinemann, B ^a   Rucker H ^a   Barth, R ^a   Bauer, J ^a   Bolze, D ^a   Bugiel, E ^a   Drews, J ^a   Ehwald, K E ^a   Grabolla, T ^a   Haak, U ^a   Hoppner W ^a   Knoll, D ^a   Kruger D ^a   Kuck, B ^a   Kurps, R ^a   Marschmeyer, M ^a   Richter, H H ^a   Schley, P ^a   Schmidt, D ^a   Scholz, R ^a   Tillack, B ^a   Winkler, W ^a   Wolansky, D ^a   Wulf, H E ^a   Yamamoto, Y ^a   Zaumseil, P ^a   more..

^a IHP   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; FABRICATION; HEAT LOSSES; ION IMPLANTATION; OSCILLATORS (ELECTRONIC); SILICON ALLOYS;

COLLECTOR DESIGN;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 0038183518     PISSN: 01631918     EISSN: None     Source Type: Journal    
DOI: 10.1109/IEDM.2002.1175953     Document Type: Article

References (3)

1. T products exceeding 220VGHz,” IEDM Tech. Dig., p. 348, 2001.
2. D.J Walkey, T.J. Smy, H. Tran, D. Marchesan, M. Schröter. “Prediction of thermal resistance in trench isolated bipolar device structures,” in Proc. BCTM, p. 207, 1998.
3. max SiGe technology,” in IEEE Electron. Devive Lett., vol. 23, pp. 541-543, September 2002.