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Volumn 2005, Issue , 2005, Pages 536-541

Design of a 4-bit 1.4 GSamples/s low power folding ADC for DS-CDMA UWB 3 transceivers

Author keywords

Current steering folding amplifier; DS CDMA; Folding ADC; Multiplier; SFDR; UWB

Indexed keywords

CURRENT STEERING FOLDING AMPLIFIER; FOLDING ADC; POWER FOLDING; SPURIOUS FREE DYNAMIC RANGE (SFDR);

EID: 33846188549     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (16)

References (14)
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  • 2
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    • A 70-MS/s 110-mW 8-b CMOS folding and interpolating A/D converter
    • Dec
    • B. Nauta, and A. G. W. Venes, "A 70-MS/s 110-mW 8-b CMOS folding and interpolating A/D converter," IEEE Journal of Solid-State Circuits, vol.30, no.12, Dec. 1995.
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  • 8
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    • (2002) IEEE Transactions on VLSI Systems , vol.10 , Issue.2 , pp. 168-174
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    • Kattmann, K.1    Barrow, J.2
  • 10
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    • An 80-MHz, 80-mW, 8-b CMOS folding A/D converter with distributed track-and-hold preprocessing
    • Dec
    • A. G. W. Venes, and R. J. Van de Plassche, "An 80-MHz, 80-mW, 8-b CMOS folding A/D converter with distributed track-and-hold preprocessing," IEEE Journal of Solid-State Circuits, vol.31, no.12, pp. 1846-1853, Dec. 1996.
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  • 12
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  • 13
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.