On the design of low-voltage, low-power CMOS analog multipliers for RF applications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 10, Issue 2, 2002, Pages 168-174

  Debono, Carl James ^a,b   Maloberti, Franco ^a   Micallef, Joseph ^b  

^a UNIVERSITY OF PAVIA   (Italy)

^b UNIVERSITY OF MALTA   (Malta)

Author keywords

Analog multiplier; CMOS RF; Low power; Low voltage

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; LINEAR INTEGRATED CIRCUITS; WIRELESS TELECOMMUNICATION SYSTEMS;

ANALOG MULTIPLIERS; PORTABLE WIRELESS COMMUNICATION SYSTEMS; RADIO FREQUENCY CIRCUITS;

MULTIPLYING CIRCUITS;

EID: 0036543343     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.994995     Document Type: Article

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