Intrinsic parameter fluctuations in MOSFETs due to structural non-uniformity of high-κ gate stack materials

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn 2005, Issue , 2005, Pages 27-30

  Brown, A R ^a   Watling, J R ^a   Asenov, A ^a   Bersuker, G ^b   Zeitzoff, P ^b  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

^b SEMATECH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIELECTRIC PROPERTIES; MOSFET DEVICES; NUMERICAL METHODS; PHASE SEPARATION;

FLUCTUATIONS; GATE STACK MATERIALS; GRAIN ORIENTATION; INTRINSIC PARAMETERS;

GATES (TRANSISTOR);

EID: 33845879329     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. International Technology Roadmap for Semiconductors (http://public.itrs. net)
2. G. D. Wilk, R. M. Wallace and J. M. Anthony, J. Appl. Phys., Vol. 89, pp.5243-5275, 2001
3. A. Asenov, S. Kaya and J. H. Davies, IEEE Trans. Electron Dev., Vol. 49, pp.112-119, 2002
4. G. Bersuker, et al., Mat. Res. Soc. Symp. Proc. Vol. 811, p.31-35, 2004
5. B. Foran, et al., Atomic Layer Deposition Conference, Helsinki, 2004
6. A. Asenov, et al., IEEE Trans. Computer Aided Design, Vol. 18, No.11, pp.1558, 1999
7. R. M. Feenstra, M. A. Lutz, F. Stern, K. Ismail, P. M. Mooney, F. K. LeGoues, C. Stanis, J. O. Chu, and B. S. Meyerson, J. Vac. Sci. Technol. B, Microelectron. Process. Phenom., Vol. 13, pp. 1608-1612, 1995.