A closed-form charge-based expression for drain current in symmetric and asymmetric double gate MOSFET

Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference

Volumn 2005, Issue , 2005, Pages 149-152

  Roy, A S ^a   Sallese, J M ^a   Enz, C C ^a,b  

^a EPFL   (Switzerland)

^b CSEM   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CHARGE; GATES (TRANSISTOR); MOSFET DEVICES;

CLOSED FORM ANALYTICAL SOLUTION; DOUBLE GATE (DG) MOST; DRAIN CURRENT;

ELECTRIC CURRENTS;

EID: 33751435838     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2005.1546607     Document Type: Conference Paper

References (6)

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2. K. Kim and J. G. Fossum. Double-gate CMOS: Symmetrical- versus asymmetrical-gate devices. IEEE Trans. Electron Devices, 48(2):294299, Feb 2001.
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5. Y. Taur. Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFET. IEEE Trans. Electron Devices, 48(12):2861-2869, Dec. 2001.
6. Y. Taur, Xiaoping Liang, Wei Wang, and Huaxin Lu. A continuous, analytic drain-current model for DG MOSFETs. IEEE Electron Dev. Let., 25(2):399-401, Feb. 2004.