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Volumn 2005, Issue , 2005, Pages 3-6
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Storage assignment during high-level synthesis for configurable architectures
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Author keywords
[No Author keywords available]
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Indexed keywords
CODES (SYMBOLS);
COMPUTATION THEORY;
ITERATIVE METHODS;
MICROPROCESSOR CHIPS;
OPTIMIZATION;
RANDOM ACCESS STORAGE;
CONFIGURABLE ARCHITECTURES;
DATA PARTITIONING;
OIL CHIPS;
REMOTE MEMORY ACCESSES;
DATA STORAGE EQUIPMENT;
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EID: 33751404869
PISSN: 10923152
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ICCAD.2005.1560030 Document Type: Conference Paper |
Times cited : (7)
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References (13)
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