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Volumn , Issue , 2006, Pages 2073-2076
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Design methodology for global resonant H-tree clock distribution networks
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Author keywords
Clock distribution networks; H tree sector; On chip inductors and capacitors; Resonance
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Indexed keywords
CLOCK DISTRIBUTION NETWORKS;
H-TREE CLOCK DISTRIBUTION;
ON-CHIP INDUCTORS AND CAPACITORS;
CAPACITORS;
CMOS INTEGRATED CIRCUITS;
COMPUTER SIMULATION;
ELECTRIC INDUCTORS;
ELECTRIC RESISTANCE;
MICROPROCESSOR CHIPS;
ELECTRIC POWER DISTRIBUTION;
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EID: 33750904271
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (14)
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References (12)
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