A Two-Step Heuristic Algorithm for Minimum-Crosstalk Routing Resource Assignment

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 53, Issue 10, 2006, Pages 1007-1011

  Cai, Yici ^a   Liu, Bin ^a   Zhou, Qiang ^a   Hong, Xianlong ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

Crosstalk; layout; routing; shield insertion; track assignment

Indexed keywords

ALGORITHMS; CROSSTALK; DATA COMMUNICATION SYSTEMS; GRAPH THEORY; HEURISTIC METHODS; OPTIMIZATION;

CROSSTALK MINIMIZATION; HEURISTIC ALGORITHM; INTEGRATED ROUTING RESOURCE ASSIGNMENT; SHIELD INSERTION; TRACK ASSIGNMENT;

ROUTERS;

EID: 33750599669     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.882353     Document Type: Article

References (14)

1. T. Gao and C. L. Liu, “Minimum crosstalk channel routing,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 15, no. 5, pp. 465–474, May 1996
2. H. Xiang, K. Y. Chao, and D. F. Wong, “An ECO algorithm for eliminating crosstalk violations,” in Proc. Int. Symp. Phys. Des., 2004, pp. 41–46
3. H. Zhou and D. F. Wang, “Global routing with crosstalk constraints,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 18, no. 11, pp. 1683–1688, Nov. 1999
4. D. Wu, J. Hu, R. Maphapatra, and M. Zhao, “Layer assignment for crosstalk risk minimization,” in Proc. Asia and South Pacific Des. Autom. Conf., 2004, pp. 159–162
5. R. Kay and R. A. Rutenbar, “Wire packing—A strong formulation of crosstalk-aware chip-level track/layer assignment with an efficient integer programming solution,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 20, no. 5, pp. 672–679, May 2001
6. S. Batterywala, N. Shenoy, W. Nicholls, and H. Zhou, “Track assignment: A desirable intermediate step between global routing and detailed routing,” in Proc. Int. Conf. Comput.-Aided Des., 2002, pp. 59–66
7. H. Yao, Q. Zhou, X. Hong, and Y. Cai, “Crosstalk driven routing resource assignment,” in Proc. Int. Symp. Circuits and Syst., 2004, pp. V89–V92
8. T. Y. Hu, Y. W. Chang, S. J. Chen, and D. T. Lee, “Crosstalk- and performance-driven multilevel full-chip routing,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 24, no. 6, pp. 869–878, Jun. 2005
9. T. Xue, E. S. Kuh, and D. Wang, “Post global routing crosstalk synthesis,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 16, no. 12, pp. 1418–1430, Dec. 1997
10. K. M. Lepak, M. Xu, J. Chen, and L. He, “Simultaneous shield insertion and net ordering under explicit RLC noise constraint,” ACM Trans. Des. Automat. Elect. Syst., vol. 9, pp. 290–309, Jul. 2004
11. P. Chen, Y. Kukimoto, and K. Keutzer, “Refining switching window by time slots for crosstalk noise calculation,” in Proc. Int. Conf. Comput.-Aided Des., 2002, pp. 583–586
12. K. W. Kim and S. M. Kang, “Crosstalk noise minimization in domino logic design,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 20, no. 9, pp. 1091–1100, Sep. 2001
13. E. de Klerk, Aspects of Semidefinite Programming. Dordrecht, The Netherlands: Kluwer, 2002
14. B. Borchers, CSDP 4.9 User's Guide.: CDSP [Online]. Available: http://infohost.nmt.edu/ borchers/csdp.html