Wire packing - A strong formulation of crosstalk-aware chip-level track/layer assignment with an efficient integer programming solution

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 5, 2001, Pages 672-679

  Kay, Rony ^a,b   Rutenbar, Rob A ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; INTEGER PROGRAMMING; LINEAR PROGRAMMING; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; OPTIMIZATION; PROBABILITY; ROUTERS;

GLOBAL ROUTING;

CROSSTALK;

EID: 0035335058     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.920702     Document Type: Article

References (23)

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