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Volumn 9, Issue 3, 2004, Pages 290-309

Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization

Author keywords

Net ordering; Noise minimization; On chip inductance; Shielding; Signal integrity; VLSI physical design automation

Indexed keywords


EID: 15844363390     PISSN: 10844309     EISSN: 10844309     Source Type: Journal    
DOI: 10.1145/1013948.1013950     Document Type: Article
Times cited : (19)

References (21)
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    • (1994) IEEE Trans. on MIT
    • Kamon, M.1    Tsuk, M.2    White, J.3
  • 10
    • 0033724255 scopus 로고    scopus 로고
    • Wire packing: A strong formulation of crosstalk-aware chip-level track/layer assignment with an efficient integer programming solution
    • KAY, R. AND RUTENBAR, R. A. 2000. Wire packing: A strong formulation of crosstalk-aware chip-level track/layer assignment with an efficient integer programming solution. In Proceedings of the International Symposium on Physical Design (Apr.).
    • (2000) Proceedings of the International Symposium on Physical Design , Issue.APR.
    • Kay, R.1    Rutenbar, R.A.2
  • 13
    • 0013006879 scopus 로고    scopus 로고
    • Simultaneous shield insertion and net ordering for coupled RLC nets under explicit noise constraint
    • LEPAK, K. M., LUWANDI, I., AND HE, L. 2001. Simultaneous shield insertion and net ordering for coupled RLC nets under explicit noise constraint. In Proceedings of the Design Automation Conference.
    • (2001) Proceedings of the Design Automation Conference
    • Lepak, K.M.1    Luwandi, I.2    He, L.3
  • 15
    • 0016035432 scopus 로고
    • Equivalent circuit models for three-dimensional multiconductor systems
    • RUEHLI, A. 1974. Equivalent circuit models for three-dimensional multiconductor systems. IEEE Trans. on MIT.
    • (1974) IEEE Trans. on MIT
    • Ruehli, A.1
  • 20
    • 0031346159 scopus 로고    scopus 로고
    • Post global routing crosstalk synthesis
    • XUE, T. AND KUH, E. S. 1997. Post global routing crosstalk synthesis. IEEE Trans. CAD-16, 1418-1430.
    • (1997) IEEE Trans. CAD-16 , pp. 1418-1430
    • Xue, T.1    Kuh, E.S.2
  • 21
    • 0032643013 scopus 로고    scopus 로고
    • Reducing cross-coupling among interconnect wires in deepsubmicron datapath design
    • YIM, J. S. AND KYUNG, C. M. 1999. Reducing cross-coupling among interconnect wires in deepsubmicron datapath design. In Proceedings of the Design Automation Conference (June).
    • (1999) Proceedings of the Design Automation Conference , Issue.JUNE
    • Yim, J.S.1    Kyung, C.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.