-
3
-
-
0346935140
-
Evolving real-time systems using hierarchical scheduling and concurrency analysis
-
Cancun, Mexico, December 3-5
-
Regehr, J., Reid, A., Webb, K., Parker, M., Lepreau J. Evolving real-time systems using hierarchical scheduling and concurrency analysis. Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), pp 25-36, Cancun, Mexico, December 3-5, 2003.
-
(2003)
Proceedings of the 24th IEEE Real-time Systems Symposium (RTSS 2003)
, pp. 25-36
-
-
Regehr, J.1
Reid, A.2
Webb, K.3
Parker, M.4
Lepreau, J.5
-
4
-
-
33749056571
-
Worst-case execution time analysis of disable interrupt regions in a commercial real-time operating system
-
Uppsala University, Coopenhagen
-
Carlsson, M., et al. Worst-Case Execution Time Analysis of Disable Interrupt Regions in a Commercial Real-Time Operating System. Proc. Workshop on Real-Time Tools, Uppsala University, Coopenhagen. 2002.
-
(2002)
Proc. Workshop on Real-time Tools
-
-
Carlsson, M.1
-
5
-
-
0033732401
-
Timing analysis for instruction caches
-
May
-
Mueller, F. Timing analysis for instruction caches. Real-Time Systems, 18(2/3), pp 209-239, May 2000.
-
(2000)
Real-time Systems
, vol.18
, Issue.2-3
, pp. 209-239
-
-
Mueller, F.1
-
7
-
-
33749596074
-
Hardware / software architectures for real-time caching
-
Jacob, B. Hardware / Software Architectures for Real-Time Caching, Proceedings of CASES Workshop, pp 135-138, 1999.
-
(1999)
Proceedings of CASES Workshop
, pp. 135-138
-
-
Jacob, B.1
-
8
-
-
13944266385
-
Long term trends for embedded system design
-
Euromicro
-
Jerraya, A. "Long Term Trends for Embedded System Design," Digital System Design, pp. 20-26. Euromicro 2004.
-
(2004)
Digital System Design
, pp. 20-26
-
-
Jerraya, A.1
-
9
-
-
77954494759
-
Deadline analysis of interrupt driven software
-
Helsinki, Finland, Sept.
-
Brylow, D., Palsberg, J. Deadline analysis of interrupt driven software, In Proc. of the 11th Intl. Symp. on the Foundations of Software Engineering (FSE), pp 198-207. Helsinki, Finland, Sept. 2003.
-
(2003)
Proc. of the 11th Intl. Symp. on the Foundations of Software Engineering (FSE)
, pp. 198-207
-
-
Brylow, D.1
Palsberg, J.2
-
11
-
-
0033343643
-
A task-level hierarchical memory model for system synthesis of multiprocessors
-
October
-
Li, Y., Wolfe, W. A Task-Level Hierarchical Memory Model for System Synthesis of Multiprocessors. IEEE Transactions on CAD, 18(10), pp. 1405-1417, October 1999.
-
(1999)
IEEE Transactions on CAD
, vol.18
, Issue.10
, pp. 1405-1417
-
-
Li, Y.1
Wolfe, W.2
-
12
-
-
31844431932
-
Preventing interrupt overload
-
Chicago, IL, June
-
Regehr, J., Duongsaa, U. Preventing Interrupt Overload. Proceedings of the A CM Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2005), pp 50-58. Chicago, IL, June 2005.
-
(2005)
Proceedings of the A CM Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2005)
, pp. 50-58
-
-
Regehr, J.1
Duongsaa, U.2
-
13
-
-
0033683314
-
Application specific memory management for embedded systems using software-controlled caches
-
June
-
Choiu, D., Jain, P., Rudolph, L., Devadas, S. Application Specific Memory Management for Embedded Systems Using Software-Controlled Caches. Proceedings of the 37th Design Automation Conference (DAC'00), pp 416-420, June 2000.
-
(2000)
Proceedings of the 37th Design Automation Conference (DAC'00)
, pp. 416-420
-
-
Choiu, D.1
Jain, P.2
Rudolph, L.3
Devadas, S.4
-
14
-
-
84872094294
-
An optimal memory allocation scheme for scratch-pad based embedded systems
-
Nov.
-
Avissar, O., Barua, R., Stewart, D. An Optimal Memory Allocation Scheme for Scratch-Pad Based Embedded Systems, ACM Transactions on Embedded Systems, Vol 1, Issue 1, pp 6-26. Nov. 2002.
-
(2002)
ACM Transactions on Embedded Systems
, vol.1
, Issue.1
, pp. 6-26
-
-
Avissar, O.1
Barua, R.2
Stewart, D.3
-
15
-
-
2942669831
-
A prioritized cache for real-time systems
-
Apr
-
Tan, Y., Mooney, V., A Prioritized cache for Real-Time Systems, Proceedings of 11th workshop on Synthesis and System Integration of Mixed Information Tech. (SASIMr03),pp.168-175, Apr 2003.
-
(2003)
Proceedings of 11th Workshop on Synthesis and System Integration of Mixed Information Tech. (SASIMr03)
, pp. 168-175
-
-
Tan, Y.1
Mooney, V.2
-
17
-
-
33749046284
-
Towards a predictable and high performance use of instruction caches in hard real-time systems
-
Porto, Portugal, July
-
Arnaud,A., Puaut, I. Towards a predictable and high performance use of instruction caches in hard real-time systems. In Proc. of the work-in-progress session of the 15th Euromicro Conference on Real-Time Systems, pp 61-64, Porto, Portugal, July 2003.
-
(2003)
Proc. of the Work-in-progress Session of the 15th Euromicro Conference on Real-time Systems
, pp. 61-64
-
-
Arnaud, A.1
Puaut, I.2
-
19
-
-
29144433545
-
A dual-mode instruction prefetch scheme for improved worst case and average case program execution times
-
Kim, S., Min, S., Park, M., et al. A Dual-mode Instruction Prefetch Scheme for Improved Worst Case and Average Case Program Execution Times. Proceedings of the 14th IEEE Real-Time Systems Symposium, pp 62-73. 1993.
-
(1993)
Proceedings of the 14th IEEE Real-time Systems Symposium
, pp. 62-73
-
-
Kim, S.1
Min, S.2
Park, M.3
-
20
-
-
0012901719
-
Memory data organization for improved cache performance in embedded processor applications
-
Panda,P., Dutt N., Nicolau, A. Memory data organization for improved cache performance in embedded processor applications. ACM Trans. Des. Autom. Electron. Syst. 2,4, pp 384 -409.1997.
-
(1997)
ACM Trans. Des. Autom. Electron. Syst.
, vol.2
, Issue.4
, pp. 384-409
-
-
Panda, P.1
Dutt, N.2
Nicolau, A.3
-
21
-
-
33749621852
-
Cluster miss prediction for instruction caches in embedded networking applications
-
Sept.
-
Batcher, K., Walker, R. Cluster Miss Prediction for Instruction Caches in Embedded Networking Applications. Proceedings of the CASES, pp-24-36. Sept. 2004.
-
(2004)
Proceedings of the CASES
, pp. 24-36
-
-
Batcher, K.1
Walker, R.2
-
22
-
-
84884343008
-
A measurement-based analysis of the real-time performance of linux
-
Abeni,L., Ashvin, G., Krasic, C., Snow, J., Walpole, J. "A Measurement-Based Analysis of the Real-Time Performance of Linux". Proceedings of the 8th IEEE Real-Time and Embedded Technology and Applications Symp, pp 133-144, 2002.
-
(2002)
Proceedings of the 8th IEEE Real-time and Embedded Technology and Applications Symp
, pp. 133-144
-
-
Abeni, L.1
Ashvin, G.2
Krasic, C.3
Snow, J.4
Walpole, J.5
-
23
-
-
33646941161
-
Discussion of misconceptions about WCET analysis
-
TODO
-
R. Kirner and P. Puschner. Discussion of Misconceptions about WCET Analysis. In WCET Workshop, TODO, 2003.
-
(2003)
WCET Workshop
-
-
Kirner, R.1
Puschner, P.2
-
24
-
-
27544504309
-
Measuring execution time and real-time performance
-
San Francisco, CA, Class 470/527, April
-
Stewart, D. "Measuring Execution Time and Real-Time Performance". Proc. of 2001 Embedded Systems Conference, San Francisco, CA, Class 470/527, April 2001.
-
(2001)
Proc. of 2001 Embedded Systems Conference
-
-
Stewart, D.1
-
26
-
-
84962779213
-
MiBench: A free, commercially representative embedded benchmark suite
-
Austin, TX, December
-
Guthaus, M., et al. MiBench: A free, commercially representative embedded benchmark suite. IEEE 4th Annual Workshop on Workload Characterization, pp 1-12. Austin, TX, December 2001.
-
(2001)
IEEE 4th Annual Workshop on Workload Characterization
, pp. 1-12
-
-
Guthaus, M.1
-
27
-
-
0021504618
-
Dhrystone: A synthetic systems programming benchmark
-
October
-
Weicker, R. Dhrystone: A synthetic systems programming benchmark. Communications of the ACM, 27(10), pp 1013-1030, October 1984.
-
(1984)
Communications of the ACM
, vol.27
, Issue.10
, pp. 1013-1030
-
-
Weicker, R.1
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