A nano-scale-sized 3D element for phase change memories

Semiconductor Science and Technology

Volumn 21, Issue 8, 2006, Pages 1013-1017

  Lv, Hangbing ^a   Lin, Yinyin ^a   Zhou, Peng ^a   Tang, Tingao ^a   Qiao, Baowei ^b   Lai, Yunfeng ^b   Feng, Jie ^b   Chen, Bomy ^c  

^a FUDAN UNIVERSITY   (China)

^b SHANGHAI JIAO TONG UNIVERSITY   (China)

^c SILICON STORAGE TECHNOLOGY INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CMOS INTEGRATED CIRCUITS; CRYSTAL STRUCTURE; LITHOGRAPHY;

PHASE CHANGE MATERIALS; PHASE CHANGE MEMORIES;

NANOTECHNOLOGY;

EID: 33749073379     PISSN: 02681242     EISSN: 13616641     Source Type: Journal    
DOI: 10.1088/0268-1242/21/8/004     Document Type: Article

References (10)

1. Lai S 2003 IEEE Conf. Proc. Int. Electron. Device Meeting p 10.1.1
2. Lai S and Laway T 2001 IEEE Conf. Proc. Int. Electron. Device Meeting p 36.5.1
3. Gill M, Lowrey T and Park J 2002 ISSCC Digest of Technical Paper vol 1 p 202
4. Horii H, Yi J H, Park J H, Ha Y H, Baek I G and Park S O 2003 Symposium on VLSl Technology Digest of Technical Papers p 177
5. Ha Y H, Yi J H, Horyii H, Park J H, Joo S H, Chung U-In and Moon J Y 2003 Symposium on VLSl Technology Digest of Technical Papers p 175
6. Pellzzer F, Pirovano A, Ottogalli F and Magistretti M 2004 Symposium on VLSI Technology Digest of Technical Papers p 18
7. Lankhorst M H R 2005 Nat. Mater. 4 347
8. Yamada N, Ohno E, Nishiuchi K and Akahira N 1991 J. Appl. Phys. 69 2849
9. http://www.azom.com/details.asp?ArticleID=1179
10. Ielmini D, Lacaita A L, Pirovano A, Pellizzer F and Bez R 2004 IEEE Electron Device Lett. 25 507