Models for reliability prediction of fine-pitch BGAs and CSPs in shock and drop-impact

IEEE Transactions on Components and Packaging Technologies

Volumn 29, Issue 3, 2006, Pages 464-474

  Lall, Pradeep ^a   Panchagade, Dhananjay R ^a   Liu, Yueli ^a   Johnson, R Wayne ^a   Suhling, Jeffrey C ^a  

^a AUBURN UNIVERSITY   (United States)

Author keywords

Area array packages; Drop simulation; Fine pitch electronics; Portable electronics; Shock impact reliability; Solder interconnects

Indexed keywords

IMPACT TESTING; MATHEMATICAL MODELS; PORTABLE EQUIPMENT; PRINTED CIRCUIT BOARDS; SHOCK TESTING; SOLDERED JOINTS;

AREA-ARRAY PACKAGES; FINE-PITCH ELECTRONICS; PORTABLE ELECTRONICS; QUAD-FLAT NO-LEAD PACKAGES; SHOCK-IMPACT RELIABILITY;

PRINTED CIRCUIT MANUFACTURE;

EID: 33748576578     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAPT.2006.880520     Document Type: Article

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