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Volumn 2006, Issue , 2006, Pages 197-202

A wide-range, high-resolution, compact, CMOS time to digital converter

Author keywords

Phase detectors; TDC; Time to digital converters; Vernier delay line

Indexed keywords

PHASE DETECTORS; TDC; TIME TO DIGITAL CONVERTERS; VERNIER DELAY LINE;

EID: 33748569088     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSID.2006.28     Document Type: Conference Paper
Times cited : (56)

References (7)
  • 1
    • 10444260492 scopus 로고    scopus 로고
    • All-digital TX frequency synthesizer and discrete-time receiver for bluetooth radio in 130-nm CMOS
    • December
    • Staszewski, R.B et al, "All-digital TX Frequency Synthesizer and Discrete-time Receiver for Bluetooth Radio in 130-nm CMOS", IEEE Journal of Solid-State Circuits, 39(12):2278-2291, December 2004
    • (2004) IEEE Journal of Solid-state Circuits , vol.39 , Issue.12 , pp. 2278-2291
    • Staszewski, R.B.1
  • 3
    • 17144435893 scopus 로고    scopus 로고
    • A high-resolution CMOS time-to-digital converter utilizing a vernier delay line
    • Feb.
    • P. Dudek; S. Szczepanski, and J. Hatfield, "A High-resolution CMOS Time-to-Digital Converter utilizing a Vernier Delay Line," IEEE J. Solid-State Circuits, vol. 35, pp. 240-247, Feb. 2000
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 240-247
    • Dudek, P.1    Szczepanski, S.2    Hatfield, J.3
  • 5
    • 84859286500 scopus 로고    scopus 로고
    • "Vernier Delay Line Interpolator and Coarse Counter Realignment," U.S. Patent 5838754, Mar. 11
    • M. Gorbics; K. Roberts and R. Sumner, "Vernier Delay Line Interpolator and Coarse Counter Realignment," U.S. Patent 5838754, Mar. 11, 1997.
    • (1997)
    • Gorbics, M.1    Roberts, K.2    Sumner, R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.