Error analysis and detection procedures for a hardware implementation of the advanced encryption standard

IEEE Transactions on Computers

Volumn 52, Issue 4, 2003, Pages 492-505

  Bertoni, Guido ^a   Breveglieri, Luca ^a   Koren, Israel ^b   Maistri, Paolo ^a   Piuri, Vincenzo ^c  

^a POLITECNICO DI MILANO   (Italy)

^b University of Massachusetts   (United States)

^c UNIVERSITY OF MILAN   (Italy)

Author keywords

Advanced encryption standard; AES; Fault detection; Fault tolerance; Parity codes

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; ERROR ANALYSIS; ERROR DETECTION; FAULT TOLERANT COMPUTER SYSTEMS; MATHEMATICAL TRANSFORMATIONS; SECURITY OF DATA; THEOREM PROVING;

ADVANCED ENCRYPTION STANDARD; PARITY CODES; RIJNDAEL ALGORITHM;

CRYPTOGRAPHY;

EID: 0037624935     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2003.1190590     Document Type: Article

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