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Volumn 2005, Issue , 2005, Pages 136-141

Address generation for FPGA RAMs for efficient implementation of real-time video processing systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DISTRIBUTED COMPUTER SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE PROCESSING; OPTIMIZATION; STORAGE ALLOCATION (COMPUTER);

EID: 33746903967     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515712     Document Type: Conference Paper
Times cited : (5)

References (15)
  • 7
    • 0142227160 scopus 로고    scopus 로고
    • Memory allocation and mapping in high-level Synthesis - An integrated approach
    • Oct.
    • J. Seo, T. Kim, and P.R. Panda, "Memory Allocation and Mapping in High-Level Synthesis - An Integrated Approach", IEEE Trans, on VLSI Syst., pp. 928 - 938, Oct. 2003.
    • (2003) IEEE Trans, on VLSI Syst. , pp. 928-938
    • Seo, J.1    Kim, T.2    Panda, P.R.3
  • 9
    • 0032295394 scopus 로고    scopus 로고
    • High-level address optimization and synthesis techniques for data-transfer-intensive applications
    • Dec
    • M. Miranda, F. Catthoor, M. Janssen and H. De Man, "High-level address optimization and synthesis techniques for data-transfer-intensive applications", IEEE Trans. on VLSI Systems, pp. 677-686, Dec 1998.
    • (1998) IEEE Trans. on VLSI Systems , pp. 677-686
    • Miranda, M.1    Catthoor, F.2    Janssen, M.3    De Man, H.4
  • 10
    • 0001151864 scopus 로고
    • Background memory area estimation for multidimensional signal processing systems
    • June
    • F. Balasa, F. Catthoor, and H.M. Man, "Background memory area estimation for multidimensional signal processing systems," IEEE Trans, on VLSI Syst. Vol 3, pp. 157-172, June 1995.
    • (1995) IEEE Trans, on VLSI Syst. , vol.3 , pp. 157-172
    • Balasa, F.1    Catthoor, F.2    Man, H.M.3
  • 12
  • 13
    • 32544449868 scopus 로고    scopus 로고
    • A comparison between local and global memory allocation for FPGA implementation of real-time video processing systems
    • Sept
    • M. O'Nils, B. Thôrnberg and H. Norell, "A Comparison between Local and Global Memory Allocation for FPGA Implementation of Real-Time Video Processing Systems", in Proc of IEEE Int. Conf. on Signals and Electronics Systems, Sept 2004.
    • (2004) Proc of IEEE Int. Conf. on Signals and Electronics Systems
    • O'Nils, M.1    Thôrnberg, B.2    Norell, H.3
  • 15
    • 32544453853 scopus 로고    scopus 로고
    • Automatic hardware synthesis of spatial memory models for real-time image processing systems
    • Riga, Latvia, Nov
    • H. Norell, B. Thörnberg and M. O'Nils, "Automatic Hardware Synthesis of Spatial Memory Models for Real-Time Image Processing Systems", Proc. of the 21th Norchip Conf., Riga, Latvia, Nov 2003.
    • (2003) Proc. of the 21th Norchip Conf.
    • Norell, H.1    Thörnberg, B.2    O'Nils, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.