Improved code optimization method utilizing memory addressing operation and its application to DSP compiler

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1996, Pages 249-252

  Sugino, Nobuhiko ^a   Miyazaki, Hironobu ^a   Iimuro, Satoshi ^a   Nishihara, Akinori ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTER AIDED SOFTWARE ENGINEERING; DATA STORAGE EQUIPMENT; DIGITAL SIGNAL PROCESSING; GRAPH THEORY; OPTIMIZATION; PROGRAM COMPILERS; SHIFT REGISTERS; STORAGE ALLOCATION (COMPUTER);

ADDRESS REGISTERS; DIGITAL SIGNAL PROCESSOR; MEMORY ADDRESSING;

DIGITAL COMPUTERS;

EID: 0029705525     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)