Photoluminescence evaluation of defects generated during SiGe-on-insulator virtual substrate fabrication: Temperature ramping process

Applied Physics Letters

Volumn 89, Issue 4, 2006, Pages

  Wang, Dong ^a   Li, Seiichiro ^a   Nakashima, Hiroshi ^a   Ikeda, Ken Ichi ^a   Nakashima, Hideharu ^a   Matsumoto, Koji ^b   Nakamae, Masahiko ^b  

^a KYUSHU UNIVERSITY   (Japan)

^b SUMCO CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CRYSTALS; DISLOCATIONS (CRYSTALS); EXCITONS; PHOTOLUMINESCENCE; SILICON WAFERS; TRANSMISSION ELECTRON MICROSCOPY;

ANNEALING TEMPERATURE; AS-GROWN WAFERS; DISLOCATION-RELATED DEFECTS; RAMPING RATE;

SILICON ON INSULATOR TECHNOLOGY;

EID: 33746659909     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.2240111     Document Type: Article

References (10)

1. T. Tezuka, N. Sugiyama, and S. Takagi, Appl. Phys. Lett. 79, 1798 (2001).
2. T. Tezuka, Y. Moriyama, S. Nakaharai, N. Sugiyama, N. Hirashita, E. Toyoda, Y. Miyamura, and S. Takagi, Thin Solid Films 508, 251 (2006).
3. G. E. Jellison, Jr. and F. A. Modine, J. Appl. Phys. 53, 3745 (1982).
4. N. Usami, K. Leo, and Y. Shiraki, J. Appl. Phys. 85, 2363 (1999).
5. D. Wang, H. Nakashima, K. Matsumoto, and M. Nakamae, Appl. Phys. Lett. 87, 251928 (2005).
6. R. Sauer, J. Weber, J. Stolz, E. R. Weber, K. H. Küsters, and H. Alexander, Appl. Phys. A: Solids Surf. 36, 1 (1985).
7. E. A. Steinman, V. I. Vdovin, T. G. Yugova, V. S. Avrutin, and N. F. Izyumskaya, Semicond. Sci. Technol. 14, 582 (1999).
8. J. Weber and M. I. Alonso, Phys. Rev. B 40, 5683 (1989).
9. T. Tezuka, T. Mizuno, N. Sugiyama, S. Nakaharai, Y. Moriyama, K. Usuda, T. Numata, N. Hirashita, T. Maeda, S. Takagi, Y. Miyamura, and E. Toyoda, Mater. Res. Soc. Symp. Proc. 809, 65 (2004).
10. S. Bedell, K. Fogel, D. Sadana, and H. Chen, Appl. Phys. Lett. 85, 5869 (2004).