Automatic discovery of RTL benchmark circuits with predefined testability properties

Proceedings - NASA/DoD Conference on Evolvable Hardware, EH

Volumn 2005, Issue , 2005, Pages 51-58

  Pečenka, Tomáš ^a   Kotásek, Zdeněk ^a   Sekanina, Lukáš ^a   Strnadel, Josef ^a  

^a BRNO UNIVERSITY OF TECHNOLOGY   (Czech Republic)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BENCHMARKING; CONTROL SYSTEM ANALYSIS; LINEAR SYSTEMS; STRUCTURAL ANALYSIS; SYSTEMS ANALYSIS;

AUTOMATIC DISCOVERY; DIAGNOSTIC PROPERTIES; RTL BENCHMARK CIRCUITS; TESTABILITY;

NETWORKS (CIRCUITS);

EID: 33746265840     PISSN: 15506029     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.2005.10     Document Type: Conference Paper

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