Simultaneous logic decomposition with technology mapping in FPGA designs

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2001, Pages 48-55

  Chen, G ^a   Cong, J ^a  

^a Engineering IV   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; GRAPHIC METHODS; INTEGRATED CIRCUITS; TABLE LOOKUP;

TECHNOLOGY MAPPING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0034998499     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/360276.360298     Document Type: Conference Paper

References (17)