Logic decomposition during technology mapping

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 8, 1997, Pages 813-834

  Lehman, Eric ^a   Watanabe, Yosinori ^a   Grodstein, Joel ^b   Harkness, Heather ^b  

^a HEWLETT PACKARD COMPANY   (United States)

^b USA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; MATHEMATICAL TRANSFORMATIONS; TREES (MATHEMATICS);

TECHNOLOGY MAPPING;

LOGIC DESIGN;

EID: 0031200347     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.644605     Document Type: Article

References (13)

1. K. S. Brace, R. L. Rudell, and R. E. Bryant, "Efficient implementation of a BDD package," in 27th ACM/IEEE Design Automation Conf., Orlando, FL, June 1990, pp. 40-45.
2. R. Brayton, G. Hachtel, and A. Sangiovanni-Vincentelli, "Multilevel logic synthesis," Proc. IEEE, vol. 78, Feb. 1990.
3. R. Brayton and C. McMullen, "The decomposition and factorization of Boolean expressions," in IEEE Int. Symp. Circuits Syst., May 1982.
4. R. E. Bryant, "Graph based algorithms for Boolean function manipulation," IEEE Trans. Comput., vol. C-35, pp. 677-691, Aug. 1986.
5. E. Detjens, G. Gannot, R. Rudell, A. Sangiovanni-Vincentelli, and A. Wang, "Technology mapping in MIS," in IEEE Int. Conf. Computer-Aided Design, Nov. 1987.
6. A. Hoffman and M. O'Donnell, "Pattern matching in trees," J. ACM, vol. 29, Jan. 1982.
7. K. Keutzer, "DAGON: Technology binding and local optimization by DAG matching," in ACM/IEEE 24th Design Automation Conf., June 1987.
8. C. Leiserson and J. Saxe, "Optimizing synchronous systems," J. VLSI Comput. Syst., vol. 1, pp. 41-67, Spring 1983.
9. C. Pixley, "A theory an implementation of sequential hardware equivalence," IEEE Trans. Computer-Aided Design, vol. 11, pp. 1469-1478, Dec. 1992.
10. E. Sentovich, K. Singh, C. Moon, H. Savoj, R. Brayton, and A. Sangiovanni-Vincentelli, "Sequential circuit design using synthesis and optimization," in IEEE Int. Conf. Comput. Design, 1992.
11. K. Singh, "Performance optimization of digital circuits," Ph.D. dissertation, Univ. California Berkeley, 1992.
12. _, private communication, 1995.
13. H. Touati, "Performance-oriented technology mapping," Ph.D. dissertation, Univ. California, Berkeley, Nov. 1990.