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Volumn 6154 I, Issue , 2006, Pages

Characterization of imaging performance for immersion lithography at NA=0.93

Author keywords

193nm lithography; ACLV; CDU; Design restrictions; Immersion lithography; OPC; Scatterometry

Indexed keywords

193NM LITHOGRAPHY; ACLV; CDU; DESIGN RESTRICTIONS; IMMERSION LITHOGRAPHY; OPC; SCATTEROMETRY;

EID: 33745784818     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.656545     Document Type: Conference Paper
Times cited : (4)

References (11)
  • 1
    • 84858922502 scopus 로고
    • "Apparatus for the photolithographic manufacture of integrated circuit elements", U.S. Patent No. 4,346,164
    • W. Taberelli and E. Loebach, "Apparatus for the photolithographic manufacture of integrated circuit elements", U.S. Patent No. 4,346,164 (1982).
    • (1982)
    • Taberelli, W.1    Loebach, E.2
  • 2
    • 0024664234 scopus 로고
    • Optical projection lithography using lenses with numerical apertures greater than unity
    • H. Kawata, J. Carter, A. Yen, and H. I. Smith, "Optical projection lithography using lenses with numerical apertures greater than unity", Microelectron. Eng. 9, 31-36 (1989).
    • (1989) Microelectron. Eng. , vol.9 , pp. 31-36
    • Kawata, H.1    Carter, J.2    Yen, A.3    Smith, H.I.4
  • 3
  • 4
    • 84858928079 scopus 로고    scopus 로고
    • 11/13
    • Silicon Strategies, 11/13/2003 (http://www.siliconinvestor.com/readmsg. aspx?msgid=19498491)
    • (2003) Silicon Strategies
  • 7
    • 33644780102 scopus 로고    scopus 로고
    • Imaging of 32-nm 1:1 lines and spaces using 193-nm immersion interference lithography with second-generation immersion fluids to achieve a numerical aperture of 1.5 and a k1 of 0.25
    • Roger H. French et al., "Imaging of 32-nm 1:1 lines and spaces using 193-nm immersion interference lithography with second-generation immersion fluids to achieve a numerical aperture of 1.5 and a k1 of 0.25", J. Microlith., Microfab., Microsyst. 4, 031103 (2005)
    • (2005) J. Microlith., Microfab., Microsyst. , vol.4 , pp. 031103
    • French, R.H.1
  • 11
    • 2942666050 scopus 로고    scopus 로고
    • High-performance circuit design for the RET-enabled 65nm technology node
    • L. Liebmann et al., "High-performance circuit design for the RET-enabled 65nm technology node", Proc. SPIE, 5379 (2004)
    • (2004) Proc. SPIE , vol.5379
    • Liebmann, L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.