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Volumn 6156, Issue , 2006, Pages

Design-friendly DFM rule

Author keywords

DFM; Gate length variation; Litho Friendly design; Preferred rule; Recommended rule; Standard cell

Indexed keywords

GATES (TRANSISTOR); MICROPROCESSOR CHIPS; OPTIMIZATION; PHOTOLITHOGRAPHY; STATISTICAL METHODS;

EID: 33745775863     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.656271     Document Type: Conference Paper
Times cited : (2)

References (6)
  • 1
    • 2942640096 scopus 로고    scopus 로고
    • Forbidden-area avoidance with spacing technique for layout optimization
    • Shi C. Shi, Alfred K. Wong, and Tung-Sang Ng, "Forbidden-area avoidance with spacing technique for layout optimization", Proc. SPIE, 5379, 67-75, 2004
    • (2004) Proc. SPIE , vol.5379 , pp. 67-75
    • Shi, S.C.1    Wong, A.K.2    Ng, T.-S.3
  • 2
    • 25144449563 scopus 로고    scopus 로고
    • Process centering OPC using design intent to improve yield
    • Michel Cote, Alex Miloslavsky Ph.D, Robert Lugg, Mike Rieger, and Philippe Hurat Ph.D, "Process Centering OPC using Design Intent to Improve Yield", Proc. SPIE, 5756, 331-339 (2005)
    • (2005) Proc. SPIE , vol.5756 , pp. 331-339
    • Cote, M.1    Miloslavsky, A.2    Lugg, R.3    Rieger, M.4    Hurat, P.5
  • 3
    • 25144510147 scopus 로고    scopus 로고
    • Using yield-focused design methodologies to speed time-to-market
    • Dr. Marc Levitt, "Using yield-focused design methodologies to speed time-to-market", Proc. SPIE, 5756, 13-20
    • Proc. SPIE , vol.5756 , pp. 13-20
    • Levitt, M.1
  • 5
    • 4444353564 scopus 로고    scopus 로고
    • Toward a systematic-variation aware timing methodology
    • Puneet Gupta, Fook-Luen Heng, "Toward a Systematic-Variation Aware Timing Methodology", Proc. Design Automation Conference, 321-326, 2004
    • (2004) Proc. Design Automation Conference , pp. 321-326
    • Gupta, P.1    Heng, F.-L.2
  • 6
    • 0242609813 scopus 로고    scopus 로고
    • Physical and timing verification of subwavelength-scale designs: I. Lithography impact on MOSFETs
    • Robert C. Pack, Valery Áxelrad, Andrei Shibkov, Victor V. Boksha, Judy A. Huckabay, Rachid Salik, Wolfgang Staud, Ruoping Wang, and Warren D. Grobman, "Physical and timing verification of subwavelength-scale designs: I. Lithography impact on MOSFETs", Proc. SPIE, 5042, 51-62, 2003
    • (2003) Proc. SPIE , vol.5042 , pp. 51-62
    • Pack, R.C.1    Áxelrad, V.2    Shibkov, A.3    Boksha, V.V.4    Huckabay, J.A.5    Salik, R.6    Staud, W.7    Wang, R.8    Grobman, W.D.9


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.