메뉴 건너뛰기




Volumn 18, Issue 2, 2006, Pages 151-172

Task scheduling in a finite-resource, reconfigurable hard ware/software codesign environment

Author keywords

Genetic algorithms; Hardware software codesign; Reconfigurable computing; Scheduling; Simulated annealing

Indexed keywords


EID: 33745725730     PISSN: 10919856     EISSN: 15265528     Source Type: Journal    
DOI: 10.1287/ijoc.1040.0106     Document Type: Article
Times cited : (22)

References (37)
  • 1
    • 0029718486 scopus 로고    scopus 로고
    • A comparison of heuristics for list schedules using the Box-method and P-method for random digraph generation
    • Baton Rouge, Louisiana
    • Al-Sharaeh, S., B. E. Wells. 1996. A comparison of heuristics for list schedules using the Box-method and P-method for random digraph generation. Proc. 28th IEEE Southeastern Sympos. System Theory. Baton Rouge, Louisiana, 467-471.
    • (1996) Proc. 28th IEEE Southeastern Sympos. System Theory , pp. 467-471
    • Al-Sharaeh, S.1    Wells, B.E.2
  • 3
    • 84862759685 scopus 로고    scopus 로고
    • Altera NIOS. 2004. http://www.altera.com/nios.
    • (2004)
  • 7
    • 84944316537 scopus 로고    scopus 로고
    • An iterative improvement co-synthesis algorithm for optimization of SOPC architecture with dynamically reconfigurable FPGAs
    • Belek-Antalya, Turkey
    • Czarnecki, R., S. Deniziak, K. Sapiecha. 2003. An iterative improvement co-synthesis algorithm for optimization of SOPC architecture with dynamically reconfigurable FPGAs. Proc. Euromicro Sympos. Digital System Design. Belek-Antalya, Turkey, 443-446.
    • (2003) Proc. Euromicro Sympos. Digital System Design , pp. 443-446
    • Czarnecki, R.1    Deniziak, S.2    Sapiecha, K.3
  • 8
    • 0032308182 scopus 로고    scopus 로고
    • CORDS: Hardware-software cosynthesis of reconfigurable real-time distributed embedded systems
    • San Jose, California
    • Dick, R. P., N. K. Jha. 1998a. CORDS: Hardware-software cosynthesis of reconfigurable real-time distributed embedded systems. Proc. 1998 IEEE/ACM Internat. Conf. Comput.-Aided Design. San Jose, California, 62-67.
    • (1998) Proc. 1998 IEEE/ACM Internat. Conf. Comput.-aided Design , pp. 62-67
    • Dick, R.P.1    Jha, N.K.2
  • 10
    • 0025440941 scopus 로고
    • Scheduling parallel program tasks onto arbitrary target machines
    • El-Rewini, H., T. T. Lewis. 1990. Scheduling parallel program tasks onto arbitrary target machines. J. Parallel Distributed Comput. 9(2) 138-153.
    • (1990) J. Parallel Distributed Comput. , vol.9 , Issue.2 , pp. 138-153
    • El-Rewini, H.1    Lewis, T.T.2
  • 11
    • 0004698157 scopus 로고    scopus 로고
    • A hybrid genetic/optimization algorithm for a task allocation problem
    • Hadj-Alouane, A. B., J. C. Bean, K. G. Murty. 1999. A hybrid genetic/optimization algorithm for a task allocation problem. J. Scheduling 2(4) 189-201.
    • (1999) J. Scheduling , vol.2 , Issue.4 , pp. 189-201
    • Hadj-Alouane, A.B.1    Bean, J.C.2    Murty, K.G.3
  • 13
    • 0000950606 scopus 로고    scopus 로고
    • The roles of FPGAs in reprogrammable systems
    • Hauck, S. 1998. The roles of FPGAs in reprogrammable systems. Proc. IEEE. 86(4) 615-638.
    • (1998) Proc. IEEE , vol.86 , Issue.4 , pp. 615-638
    • Hauck, S.1
  • 17
    • 33745701274 scopus 로고    scopus 로고
    • Unpublished doctoral dissertation, Dissertation. University of Alabama, Huntsville, Alabama
    • Loo, S. M. 2003. Static scheduling in a reconfigurable hardware environment. Unpublished doctoral dissertation, Dissertation. University of Alabama, Huntsville, Alabama.
    • (2003) Static Scheduling in a Reconfigurable Hardware Environment
    • Loo, S.M.1
  • 19
    • 0036042430 scopus 로고    scopus 로고
    • Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
    • Estes Park, CO
    • Noguera, J., R. M. Badia. 2002a. Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures. Proc. 10th Internat. Sympos. Hardware/Software Codesign, Estes Park, CO, 205-210.
    • (2002) Proc. 10th Internat. Sympos. Hardware/Software Codesign , pp. 205-210
    • Noguera, J.1    Badia, R.M.2
  • 20
    • 0036705054 scopus 로고    scopus 로고
    • HW/SW codesign techniques for dynamically reconfigurable architectures
    • Noguera, J., R. M. Badia. 2002b. HW/SW codesign techniques for dynamically reconfigurable architectures. IEEE Trans. Very Large Scale Integration Systems. 10(4) 399-415.
    • (2002) IEEE Trans. Very Large Scale Integration Systems , vol.10 , Issue.4 , pp. 399-415
    • Noguera, J.1    Badia, R.M.2
  • 21
    • 84862769707 scopus 로고    scopus 로고
    • OCPIP (Open Core Protocol Specification, 2.0 Release Candidate). 2004. OCP international partnership, http://www.ocp-ip.org.
    • (2004) OCP International Partnership
  • 22
    • 0030081655 scopus 로고    scopus 로고
    • Modeling of multibody systems with the object-oriented modeling language dymola
    • Otter, M., H. Elmqvist, F. E. Cellier. 1996. Modeling of multibody systems with the object-oriented modeling language dymola. Nonlinear Dynamics 9 91-112.
    • (1996) Nonlinear Dynamics , vol.9 , pp. 91-112
    • Otter, M.1    Elmqvist, H.2    Cellier, F.E.3
  • 25
    • 84962312624 scopus 로고    scopus 로고
    • Hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs
    • Bangalore, India
    • Shang, L., N. K. Jha. 2002. Hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs. 15th IEEE Internat. Conf. VLSI Design (VLSI). Bangalore, India, 345-352.
    • (2002) 15th IEEE Internat. Conf. VLSI Design (VLSI) , pp. 345-352
    • Shang, L.1    Jha, N.K.2
  • 27
    • 27744573276 scopus 로고    scopus 로고
    • A standard task graph set for fair evaluation of multiprocessor scheduling algorithms
    • Tobita, T., H. Kasahara. 2002. A standard task graph set for fair evaluation of multiprocessor scheduling algorithms. J. Scheduling. 5 379-394.
    • (2002) J. Scheduling , vol.5 , pp. 379-394
    • Tobita, T.1    Kasahara, H.2
  • 28
    • 84941336245 scopus 로고    scopus 로고
    • Task graph extraction for embedded system synthesis
    • New Delhi, India
    • Vallerio, K. S., N. K. Jha. 2003. Task graph extraction for embedded system synthesis. Proc. Internat. Conf. VLSI Design, New Delhi, India, 480-486.
    • (2003) Proc. Internat. Conf. VLSI Design , pp. 480-486
    • Vallerio, K.S.1    Jha, N.K.2
  • 29
    • 0036287866 scopus 로고    scopus 로고
    • Task graph transformation to aid system synthesis
    • Phuket, Thailand
    • Vallerio, K. S., N. K. Jha. 2002. Task graph transformation to aid system synthesis. Proc. Internat. Conf. Circuits Systems, Phuket, Thailand, 695-698.
    • (2002) Proc. Internat. Conf. Circuits Systems , pp. 695-698
    • Vallerio, K.S.1    Jha, N.K.2
  • 30
    • 33745701790 scopus 로고
    • A hard real-time static task allocation methodology for highly-constrained message-passing environments
    • Wells, B. E. 1995. A hard real-time static task allocation methodology for highly-constrained message-passing environments. Internat. J. Comput. Their Appl. 2(3) 123-136.
    • (1995) Internat. J. Comput. Their Appl. , vol.2 , Issue.3 , pp. 123-136
    • Wells, B.E.1
  • 31
    • 0031123627 scopus 로고    scopus 로고
    • Parallel simulation of a large scale aerospace system in a multicomputer environment
    • Wells, B. E, K. G. Ricks, J. M. Weir. 1997. Parallel simulation of a large scale aerospace system in a multicomputer environment. IEEE Trans. Aerospace Electronic Systems 33(2) 507-522.
    • (1997) IEEE Trans. Aerospace Electronic Systems , vol.33 , Issue.2 , pp. 507-522
    • Wells, B.E.1    Ricks, K.G.2    Weir, J.M.3
  • 32
    • 0344089201 scopus 로고    scopus 로고
    • A decade of hardware/software codesign
    • Wolf, W. 2003. A decade of hardware/software codesign. IEEE Comput. Magazine. 36(4) 38-43.
    • (2003) IEEE Comput. Magazine , vol.36 , Issue.4 , pp. 38-43
    • Wolf, W.1
  • 37
    • 84862770491 scopus 로고    scopus 로고
    • Xilinx MicroBlaze. 2004. http://www.xilinx.com/microblaze.
    • (2004)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.