Platform based deisign of all binary motion estimation (ABME) with bus interleaved architecture

2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)

Volumn 2005, Issue , 2005, Pages 241-244

  Wang, Shih Hao ^a   Tao, Wei Lun ^a   Wang, Chung Neng ^a   Peng, Wen Hsiao ^a   Chiang, Tihao ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BINARY CODES; BUSBARS; COMPUTER HARDWARE; COMPUTER SOFTWARE; CONFORMAL MAPPING; DATA REDUCTION; REDUCTION; TWO DIMENSIONAL;

ALL BINARY MOTION ESTIMATION (ABME); BLOCK MATCHING METRIC; BUS INTERLEAVED ARCHITECTURE; SUM OF DIFFERENCE (SOD);

MOTION ESTIMATION;

EID: 33745436437     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VDAT.2005.1500065     Document Type: Conference Paper

References (7)

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