Global elimination algorithm and architecture design for fast block matching motion estimation

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 14, Issue 6, 2004, Pages 898-907

  Huang, Yu Wen ^a   Chien, Shao Yi ^a,b   Hsieh, Bing Yu ^c   Chen, Liang Gee ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^b Quanta Computer   (Taiwan)

^c MEDIATEK INC   (Taiwan)

Author keywords

Block matching; Global elimination algorithm (GEA); Motion estimation (ME); Successive elimination algorithm (SEA)

Indexed keywords

BLOCK MATCHING; GLOBAL ELIMINATION ALGORITHM (GEA); MOTION ESTIMATION (ME); SUCCESSIVE ELIMINATION ALGORITHM (SEA);

ALGORITHMS; COMPUTATIONAL METHODS; COMPUTER SIMULATION; IMAGE CODING; IMAGE QUALITY; SIGNAL TO NOISE RATIO; STANDARDS; SYSTOLIC ARRAYS; VLSI CIRCUITS;

MOTION ESTIMATION;

EID: 2942685407     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSVT.2004.828321     Document Type: Article

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