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Volumn 40, Issue 6, 2005, Pages 224-236

Shangri-La: Achieving high performance from compiled network applications while enabling ease of programming

Author keywords

Chip multiprocessors; Dataflow programming; Network processors; Packet processing; Program partitioning; Throughput oriented computing

Indexed keywords

C (PROGRAMMING LANGUAGE); DATA HANDLING; PACKET NETWORKS; PROGRAM COMPILERS; PROGRAM PROCESSORS; STORAGE ALLOCATION (COMPUTER);

EID: 33745233805     PISSN: 03621340     EISSN: 03621340     Source Type: Journal    
DOI: 10.1145/1064978.1065038     Document Type: Article
Times cited : (24)

References (38)
  • 1
    • 31844448427 scopus 로고    scopus 로고
    • The SGI pro64 compiler infrastructure: A tutorial
    • Philadelphia, PA, October
    • Amaral, J.N., Gao, G.R., Dehnert, J. and Towle, R. The SGI Pro64 Compiler Infrastructure: A Tutorial. In PACT'00, Philadelphia, PA, October 2000.
    • (2000) PACT'00
    • Amaral, J.N.1    Gao, G.R.2    Dehnert, J.3    Towle, R.4
  • 2
  • 3
    • 84968830512 scopus 로고    scopus 로고
    • Memory hierarchy design for a multiprocessor look-up engine
    • New Orleans, LA, September
    • Baer, J.L., Low, D., Crowley, P. and Sidhwaney, N. Memory Hierarchy Design for a Multiprocessor Look-up Engine. In PACT'03, New Orleans, LA, September 2003.
    • (2003) PACT'03
    • Baer, J.L.1    Low, D.2    Crowley, P.3    Sidhwaney, N.4
  • 5
    • 85084164268 scopus 로고    scopus 로고
    • Flexible control of parallelism in a multiprocessor PC router
    • Boston, MA, June
    • Chen, B. and Morris, R. Flexible Control of Parallelism in a Multiprocessor PC Router. In USENIX 2001 Annual Technical Conference, Boston, MA, June 2001.
    • (2001) USENIX 2001 Annual Technical Conference
    • Chen, B.1    Morris, R.2
  • 6
    • 0032624503 scopus 로고    scopus 로고
    • High-performance IP routing table lookup using CPU caching
    • New York, NY, March
    • Chiueh, T. and Pradhan, P. High-performance IP routing table lookup using CPU caching. In IEEE Infocom '99, New York, NY, March 1999.
    • (1999) IEEE Infocom '99
    • Chiueh, T.1    Pradhan, P.2
  • 7
    • 0030672497 scopus 로고    scopus 로고
    • A new algorithm for partial redundancy elimination based on SSA form
    • Las Vegas, NV, June
    • Chow, F., Chan, S., Kennedy, R., Liu, S.M., Lo, R. and Tu, P. A new algorithm for partial redundancy elimination based on SSA form. In PLDI'97, Las Vegas, NV, June 1997.
    • (1997) PLDI'97
    • Chow, F.1    Chan, S.2    Kennedy, R.3    Liu, S.M.4    Lo, R.5    Tu, P.6
  • 8
    • 0031601050 scopus 로고    scopus 로고
    • Compiler-controlled memory
    • San Jose, CA, October
    • Cooper, K. and Harvey, T. Compiler-Controlled Memory. In ASPLOS-VIII, San Jose, CA, October 1998.
    • (1998) ASPLOS-VIII
    • Cooper, K.1    Harvey, T.2
  • 9
    • 0028056506 scopus 로고
    • Memory access coalescing: A technique for eliminating redundant memory accesses
    • Orlando, FL, June
    • Davidson, J. and Jinturkar, S. Memory Access Coalescing: A Technique for Eliminating Redundant Memory Accesses. In PLDI'94, Orlando, FL, June 1994.
    • (1994) PLDI'94
    • Davidson, J.1    Jinturkar, S.2
  • 10
    • 31844456792 scopus 로고    scopus 로고
    • Automatically partitioning packet processing applications for pipelined architectures
    • To appear, Chicago, IL, June
    • Dai, J., Huang, B., Li, L. and Harrison, L. Automatically Partitioning Packet Processing Applications for Pipelined Architectures. To appear in PLDI'05, Chicago, IL, June 2005.
    • (2005) PLDI'05
    • Dai, J.1    Huang, B.2    Li, L.3    Harrison, L.4
  • 11
    • 0031642546 scopus 로고    scopus 로고
    • Type-based alias analysis
    • Montreal, Canada, June
    • Diwan, A., McKinley, K. and Moss, E. Type-Based Alias Analysis. In PLDI'98, Montreal, Canada, June 1998.
    • (1998) PLDI'98
    • Diwan, A.1    McKinley, K.2    Moss, E.3
  • 12
    • 0038039931 scopus 로고    scopus 로고
    • Taming the IXP network processor
    • San Diego, CA, June
    • George, L. and Blume, M. Taming the IXP Network Processor. In PLDI'03, San Diego, CA, June 2003.
    • (2003) PLDI'03
    • George, L.1    Blume, M.2
  • 19
    • 31844440089 scopus 로고    scopus 로고
    • Open research compiler for itanium processor family
    • Tutorial, Austin, TX, December
    • Ju, R., Chan, S. and Wu, Chengyong. Open Research Compiler for Itanium Processor Family. Tutorial in MICRO-34, Austin, TX, December 2001.
    • (2001) MICRO-34
    • Ju, R.1    Chan, S.2    Wu, C.3
  • 21
    • 0036953812 scopus 로고    scopus 로고
    • Programming language optimizations for modular router configurations
    • San Jose, CA October
    • Kohler, E., Morris, R. and Chen, B. Programming language optimizations for modular router configurations. In ASPLOS-X, San Jose, CA October 2002.
    • (2002) ASPLOS-X
    • Kohler, E.1    Morris, R.2    Chen, B.3
  • 22
    • 33847173637 scopus 로고    scopus 로고
    • Experiences with a retargetable compiler for a commercial network processor
    • Grenoble, France, October
    • Kim, J., Jung, S. and Park, Y. Experiences with a Retargetable Compiler for a Commercial Network Processor. In CASES'02, Grenoble, France, October 2003.
    • (2003) CASES'02
    • Kim, J.1    Jung, S.2    Park, Y.3
  • 23
    • 11244303443 scopus 로고    scopus 로고
    • Programming challenges in network processor deployment
    • San Jose, CA, October
    • Kulkarni, C., Gries, M., Sauer, C. and Keutzer, K. Programming Challenges in Network Processor Deployment. In CASES'03, San Jose, CA, October 2003.
    • (2003) CASES'03
    • Kulkarni, C.1    Gries, M.2    Sauer, C.3    Keutzer, K.4
  • 24
    • 18844422983 scopus 로고    scopus 로고
    • Simple offset assignment in presence of subword data
    • San Jose, CA, October
    • Li, B. and Gupta, R. Simple Offset Assignment in Presence of Subword Data. In CASES'03, San Jose, CA, October 2003.
    • (2003) CASES'03
    • Li, B.1    Gupta, R.2
  • 25
    • 0005391346 scopus 로고    scopus 로고
    • Performance modeling for fast IP lookups
    • Cambridge, MA, June
    • Narlikar, G. and Zane, F. Performance Modeling for Fast IP Lookups. In SIGMETRICS'01, Cambridge, MA, June 2001.
    • (2001) SIGMETRICS'01
    • Narlikar, G.1    Zane, F.2
  • 33
    • 0034446947 scopus 로고    scopus 로고
    • Bitwidth analysis with application to silicon compilation
    • Vancouver, BC, June
    • Stephenson, M., Babb, J. and Amarasinghe, S. Bitwidth Analysis with Application to Silicon Compilation. In PLDI'00, Vancouver, BC, June 2000.
    • (2000) PLDI'00
    • Stephenson, M.1    Babb, J.2    Amarasinghe, S.3
  • 35
    • 18844371462 scopus 로고    scopus 로고
    • Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
    • San Jose, CA, October
    • Udayakumaran, S. and Barua, R. Compiler-Decided Dynamic Memory Allocation for Scratch-Pad Based Embedded Systems. In CASES'03, San Jose, CA, October 2003.
    • (2003) CASES'03
    • Udayakumaran, S.1    Barua, R.2
  • 37
    • 8344266079 scopus 로고    scopus 로고
    • Balancing register allocation across threads for a multithreaded network processor
    • Washington, DC, June
    • Zhuang, X. and Pande, S. Balancing Register Allocation Across Threads for a Multithreaded Network Processor. In PLDI'04, Washington, DC, June 2004.
    • (2004) PLDI'04
    • Zhuang, X.1    Pande, S.2
  • 38
    • 31844455726 scopus 로고    scopus 로고
    • Resolving register bank conflicts for a network processor
    • New Orleans, LA, June
    • Zhuang, X. and Pande, S. Resolving Register Bank Conflicts for a Network Processor. In PLDI'03, New Orleans, LA, June 2004.
    • (2004) PLDI'03
    • Zhuang, X.1    Pande, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.